Browse the instruction set by extension. Pick an extension to see every instruction defined inside it.
The base integer I extension is the most widely implemented set of instructions. Start there if you're looking for the core ISA.
Bit Manipulation Instructions
Compressed Instructions
Double-Precision Floating-Point
Single-Precision Floating-Point
Hypervisor
Base Integer ISA
Integer Multiply And Divide
Quad-Precision Floating-Point
Supervisor Mode
Debug
Double Trap In M-Mode
Resumable Non-Maskable Interrupts
Fine-Grained Address-Translation Cache Invalidation
Vector Operations
Load-Acquire/Store-Release Atomic Instructions
Byte And Halfword Atomic Memory Operations
Atomic Compare-And-Swap (CAS) Instructions
Atomic Load-Acquire And Store-Release
Load-Reserved/Store-Conditional Instructions
Wait-On-Reservation-Set Instructions
Address Generation
Basic Bit-Manipulation
Carry-Less Multiplication
Bit-Manipulation For Cryptography
Crossbar Permutations
Single-Bit Instructions
Simple Code-Size Saving Instructions
Compressed Double-Precision Floating-Point Loads/stores
Compressed Single-Precision Floating-Point Loads/stores
Compressed May-Be-Operations
Complex PUSH/POP And Double Move
Table Jump
Additional Floating-Point Instructions
Scalar BF16 Converts
Half-Precision Floating Point
Cache-Block Management Instructions
Cache-Block Prefetch
Cache-Block Zero Instruction
Landing Pad
Shadow Stack
Integer Conditional Operations
Control And Status Register Instructions
Instruction Fence
Non-Temporal Locality Hints
Pause Hint
May-Be-Operations
NIST Algorithm Suite
NIST Suite: AES Decryption
NIST Suite: AES Encryption
NIST Suite: SHA2 Hashing
ShangMi Algorithm Suite
Vector Basic Bit-Manipulation
Vector Carryless Multiplication
Vector BF16 Converts
Vector BF16 Widening Mul-Add
Vector GCM/GMAC
NIST Suite: Vector AES Block Cipher
NIST Suite: Vector SHA-2 Secure Hash (SHA-256)
ShangMi Algorithm Suite