addiw

Extension: [object Object] and [object Object]
Base: RV32 + RV64

Add an immediate to the 32-bit value in xs1, and store the sign extended result in xd

Synopsis

addiw xd, xs1, imm

Pseudo-Instruction sext.w xd, xs1
            equals addiw xd, xs1, 0
              when imm == 0

Type: I

funct3: 000

opcode: 0011011