bge

Branch to PC + imm if the signed value in register xs1 is greater than or equal to the signed value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned.

Synopsis

bge xs1, xs2, imm

Pseudo-Instruction blez xs2, imm
            equals bge 0, xs2, imm
              when xs1 == 0

Pseudo-Instruction bgez xs1, imm
            equals bge xs1, 0, imm
              when xs2 == 0

Pseudo-Instruction ble xs2, xs1, imm
            equals bge xs1, xs2, imm
              when true

Encoding

Type:

funct3: 101

opcode: 1100011

RISC-V Instruction Encoder/Decoder

open bge in rvcodecjs

Availability

Extension: I
Base: RV32 + RV64