The `sinval.vma` instruction invalidates any address-translation cache entries that an `sfence.vma` instruction with the same values of xs1 and xs2 would invalidate. However, unlike `sfence.vma`, `sinval.vma` instructions are only ordered with respect to `sfence.vma`, `sfence.w.inval`, and `sfence.inval.ir` instructions as defined below.
sinval.vma xs1, xs2Type: